Second Semester_Digital Logic_Registers, Counters, Memories and Programmable Logic Devices

 

6.1 Registers, Shift Registers

• Registers: A register is a group of flip-flops used to store multiple bits of data.

  • Types: Parallel register (load all bits simultaneously), Serial register (load one bit at a time)

• Shift Registers: A special type of register used to shift data in either direction.

  • Types:

    1. Serial-in Serial-out (SISO)

    2. Serial-in Parallel-out (SIPO)

    3. Parallel-in Serial-out (PISO)

    4. Parallel-in Parallel-out (PIPO)

  • Applications: Data transfer, delay circuits, data storage.

---

6.2 Analysis of Synchronous Sequential Circuits

• Synchronous Sequential Circuit: Output depends on current input and past states, controlled by a clock signal.

• Analysis Steps:

  1. Identify flip-flops and their type (D, T, JK, SR).

  2. Create excitation table for flip-flops.

  3. Determine next-state equation.

  4. Derive output equation.

  5. Draw state table and state diagram.

---

6.3 Design of Synchronous Sequential Circuits

• Counters: A type of sequential circuit that goes through a predefined sequence of states.

  • Types:

    • Asynchronous (ripple) counters: Flip-flops triggered by preceding flip-flop.

    • Synchronous counters: All flip-flops triggered by the same clock.

• State Diagram: Graphical representation of states and transitions.

• State Reduction: Minimizing the number of states for simplification.

• State Assignment: Assigning binary codes to each state for implementation.

---

6.4 Analysis of Asynchronous Sequential Circuits

• Asynchronous Sequential Circuit: Outputs depend on current inputs and past states, without a clock.

• Analysis Steps:

  1. Identify inputs, outputs, and states.

  2. Draw flow table.

  3. Determine excitation table for flip-flops.

  4. Derive output expressions.

• Challenges: Race conditions and hazards.

---

6.5 Problems of Asynchronous Sequential Circuit Design

• Race Conditions: Two or more state variables change simultaneously causing unpredictable results.

• Hazards: Unwanted transient changes in outputs.

  • Static hazard: Output briefly changes when it should remain constant.

  • Dynamic hazard: Output changes more than once during a transition.

• Timing Issues: Difficult to synchronize inputs and outputs.

---

6.6 Memories: ROM, PROM, EPROM

• ROM (Read-Only Memory): Non-volatile, programmed during manufacturing.

• PROM (Programmable ROM): Can be programmed once after manufacturing.

• EPROM (Erasable PROM): Can be erased (using UV light) and reprogrammed multiple times.

---

6.7 PLD, PLA

• PLD (Programmable Logic Device): Device that can implement logic circuits.

• PLA (Programmable Logic Array): A type of PLD with programmable AND and OR planes to implement combinational logic functions.

• Other PLDs: PAL (Programmable Array Logic), CPLD, FPGA.

---

6.8 Digital Logic Families: TTL, ECL, CMOS

• TTL (Transistor-Transistor Logic): Fast, moderate power, standard logic levels.

• ECL (Emitter-Coupled Logic): Very high speed, high power consumption, low noise margin.

• CMOS (Complementary MOS): Low power, high noise margin, used in VLSI.